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Advanced Truth Table Generator

Advanced Truth Table Generator

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Gate Conversion
Verilog Code
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Use AND, OR, NOT, XOR, NAND, NOR, IMPLIES or symbols: Β· + - βŠ• β†’

πŸ”„ Auto-Generate Boolean Formulas

Quickly generate common boolean expressions:

Click any button to automatically set the formula and variables

Quick Formulas

Expanded Formula

Truth Table

Universal Gate Conversion

Convert any boolean expression to use only NAND gates or only XOR gates. These are universal gates that can implement any boolean function.

About Universal Gates

NAND Gate: Known as a universal gate because any boolean function can be implemented using only NAND gates. This is widely used in CMOS technology.

XOR Gate: While not fully universal alone, XOR gates are fundamental in arithmetic circuits, parity generation, and cryptography. Many functions can be efficiently implemented using XOR gates.

πŸ”§ NAND Gate Conversion

Convert to use only NAND gates

⚑ XOR Gate Conversion

Convert to use XOR gates where possible

Verilog Code Generator

Generate Verilog HDL code from your boolean expression for digital circuit simulation.

How to Use

Enter a boolean formula using logical operators and specify the variables to generate a truth table.

Supported Operators

OperatorSymbolsDescription
ANDAND, Β·, &, &&Logical conjunction
OROR, +, |, ||Logical disjunction
NOTNOT, -, ~, !Logical negation
XORXOR, βŠ•Exclusive OR
NANDNANDNot AND
NORNORNot OR
IMPLIESIMPLIES, β†’, =>Logical implication

Gate Conversion Features

The tool can convert any boolean expression to use only specific gate types:

  • NAND Gate Conversion: Convert any expression to use only NAND gates (universal gate)
  • XOR Gate Conversion: Optimize expressions using XOR gates for arithmetic and parity functions
  • Step-by-step conversion: See how each operator is converted to the target gate type

Universal Gate Properties

GateUniversal?Common Uses
NANDYesCMOS technology, basic logic circuits
NORYesNMOS technology, memory circuits
XORNo (with NOT)Arithmetic, parity, cryptography

Verilog Code Generation

The tool can generate Verilog HDL code for your boolean expressions that can be:

  • Simulated in DigitalJS online simulator
  • Used in FPGA/ASIC design workflows
  • Integrated into larger digital systems

Auto-Generation Features

Quickly generate common boolean expressions with different complexity levels:

  • Basic: Simple gates and combinations
  • Intermediate: Multi-gate circuits and common logic
  • Advanced: Complex expressions and real-world examples

Examples

  • a AND b - Logical AND
  • a OR (NOT b) - a OR NOT b
  • (a AND b) OR c - a AND b OR c
  • a IMPLIES b - If a then b
  • a XOR b - Exclusive OR
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