Design a circuit for a door lock that opens (output = 1) if exactly one of three keys (A, B, C) is inserted.
Derive the logical expression for a full adder’s sum output and implement using NOR gates.
Describe how a full adder can be constructed using two half adders.
Design a circuit for F = Σ(2, 3, 6, 7) using a K-map simplification.
Explain the role of flip-flops in a CPU’s register and their impact on performance.
Answers and Descriptions for Group 6
Answer: F = A’B’C + A’BC’ + AB’C’. Circuit: Three AND gates, one OR gate.
Description: This scenario requires precise condition analysis, advancing truth table and circuit design skills.
[Image Placeholder: Door lock circuit]Answer: Sum = A XOR B XOR Cin. NOR implementation requires multiple gates to replicate XOR.
Description: This complex task combines derivation and universal gate usage, testing advanced circuit design.
[Image Placeholder: Full adder sum using NOR]Answer: First half adder: A + B = Sum1, Carry1. Second half adder: Sum1 + Cin = Sum, Carry2. OR Carry1 and Carry2 for final carry.
Description: This illustrates modular CPU design, showing how complex circuits are built from simpler ones.
[Image Placeholder: Full adder using half adders]Answer: F = BC. Circuit: Single AND gate.
Description: K-map simplification yields a minimal circuit, reinforcing optimization techniques.
[Image Placeholder: K-map and circuit for F]Answer: Flip-flops store register data, enabling fast access and state retention, improving CPU performance.
Description: This connects sequential logic to CPU efficiency, deepening system-level understanding
